Implementation of the HSDL-1100

Required External Components Table 2 describes the external components required for obtaining datasheet performance (Actual values for the components may vary with the I/O chip, controller chip, EnDec chip, or buffer chip that the HSDL-1100 interfaces to). Board Layout Requirements Proper board layout is crucial to the noise immunity of the overall Ir system. Compromised board layout may lead to reduced sesitivity, and therefore shorter achievable Ir link distance. Proper board layout is descibed in detail in page 16 of the Agilent Technologies IrDA Design Guide. Keys aspects of proper board layout are: • VCC to Gnd bypass capacitor CX5 should be placed within
0.5 cm of the HSDL-1100 module pins 2,4, AND on the same side of the PC board as
the HSDL-1100 module. • The PIN bypass capacitor CX1 should be <0.5 cm from pin 1 of the HSDL-1100 module. • A multi-layer PC board should be used, and one layer devoted to a ground plane for the HSDL-1100 module. The ground plane should be laid out as an
island, with one connection to a clean (<20 mV noise) system ground or analog
system ground, and separated from the ground connection of fast switching devices, or noise sources. • The board underneath and 1 cm in any direction around the module is defined as the critical ground plane zone.